GadgetSeed  0.9.6
interrupt.c
[詳解]
1 /** @file
2  @brief STM32 割り込みハンドラ
3 
4  @date 2013.03.10
5  @author Takashi SHUDO
6 */
7 
8 #include "interrupt.h"
9 #include "sysconfig.h"
10 #include "tkprintf.h"
11 #include "task/calltrace.h"
12 #include "task/task.h"
13 
14 unsigned int last_int;
15 void *last_sp;
16 
17 volatile int flg_interrput_proc = 0;
18 typedef void (*inthdr)(void);
19 typedef void (*gs_inthdr)(unsigned int intnum, void *sp);
20 
21 int is_in_interrupt(void)
22 {
23  return flg_interrput_proc;
24 }
25 
26 static void unreg_inthdr(unsigned int intnum, void *sp)
27 {
28  SYSERR_PRINT("Unknown interrupt(%u).\n", intnum);
29 
30  disp_regs((union st_regs *)sp);
31 
32  while(1)
33  ;
34 }
35 
36 #define CFSR (*(volatile unsigned int *)0xE000ED28)
37 #define MMSR (*(volatile unsigned char *)0xE000ED28)
38 #define BFSR (*(volatile unsigned char *)0xE000ED29)
39 #define UFSR (*(volatile unsigned short *)0xE000ED2A)
40 #define HFSR (*(volatile unsigned int *)0xE000ED2C)
41 #define DFSR (*(volatile unsigned int *)0xE000ED30)
42 #define AFSR (*(volatile unsigned int *)0xE000ED3C)
43 
44 #define DHCSR (*(volatile unsigned int *)0xE000EDF0)
45 #define DCRSR (*(volatile unsigned int *)0xE000EDF4)
46 #define DCRDR (*(volatile unsigned int *)0xE000EDF8)
47 #define DEMCR (*(volatile unsigned int *)0xE000EDFC)
48 
49 void disp_debug_info(void)
50 {
51  tkprintf("CFSR = %08X\n", CFSR);
52  tkprintf(" MMSR = %02X\n", MMSR);
53  tkprintf(" BFSR = %02X\n", BFSR);
54  tkprintf(" UFSR = %04X\n", UFSR);
55  tkprintf("HFSR = %08X\n", HFSR);
56  tkprintf("DFSR = %08X\n", DFSR);
57  tkprintf("AFSR = %08X\n", AFSR);
58 
59  tkprintf("DHCSR = %08X\n", DHCSR);
60  tkprintf("DCRSR = %08X\n", DCRSR);
61  tkprintf("DCRDR = %08X\n", DCRDR);
62  tkprintf("DEMCR = %08X\n", DEMCR);
63 
64  tkprintf("Last Int = %02X(%d)\n", (int)last_int, (int)last_int);
65  tkprintf("Last SP = %08X\n", (int)last_sp);
66 }
67 
68 
69 void fault_inthdr(unsigned int intnum, void *sp)
70 {
71  switch(intnum) {
72  case 3:
73  SYSERR_PRINT("Hard Fault Interrupt(%d).\n", intnum);
74  break;
75 
76  case 4:
77  SYSERR_PRINT("Mem Manage Interrupt(%d).\n", intnum);
78  break;
79 
80  case 5:
81  SYSERR_PRINT("Buf Fault Interrupt(%d).\n", intnum);
82  break;
83 
84  case 6:
85  SYSERR_PRINT("Usage Fault Interrupt(%d).\n", intnum);
86  break;
87 
88  default:
89  SYSERR_PRINT("??? Interrupt(%d).\n", intnum);
90  break;
91  }
92 
93  disp_task_info();
94 
95  disp_regs((union st_regs *)sp);
96 
97  disp_debug_info();
98 
99  print_task();
100 
101  print_stack();
102 
103  print_queues();
104 
105  print_calltrace();
106 
107  while(1)
108  ;
109 }
110 
111 void ur_inthdr_000(unsigned int intnum, void *sp){unreg_inthdr(0,sp);}
112 void ur_inthdr_001(unsigned int intnum, void *sp){unreg_inthdr(1,sp);}
113 void ur_inthdr_002(unsigned int intnum, void *sp){unreg_inthdr(2,sp);}
114 void ur_inthdr_003(unsigned int intnum, void *sp){unreg_inthdr(3,sp);}
115 void ur_inthdr_004(unsigned int intnum, void *sp){unreg_inthdr(4,sp);}
116 void ur_inthdr_005(unsigned int intnum, void *sp){unreg_inthdr(5,sp);}
117 void ur_inthdr_006(unsigned int intnum, void *sp){unreg_inthdr(6,sp);}
118 void ur_inthdr_007(unsigned int intnum, void *sp){unreg_inthdr(7,sp);}
119 void ur_inthdr_008(unsigned int intnum, void *sp){unreg_inthdr(8,sp);}
120 void ur_inthdr_009(unsigned int intnum, void *sp){unreg_inthdr(9,sp);}
121 void ur_inthdr_010(unsigned int intnum, void *sp){unreg_inthdr(10,sp);}
122 void ur_inthdr_011(unsigned int intnum, void *sp){unreg_inthdr(11,sp);}
123 void ur_inthdr_012(unsigned int intnum, void *sp){unreg_inthdr(12,sp);}
124 void ur_inthdr_013(unsigned int intnum, void *sp){unreg_inthdr(13,sp);}
125 void ur_inthdr_014(unsigned int intnum, void *sp){unreg_inthdr(14,sp);}
126 void ur_inthdr_015(unsigned int intnum, void *sp){unreg_inthdr(15,sp);}
127 void ur_inthdr_016(unsigned int intnum, void *sp){unreg_inthdr(16,sp);}
128 void ur_inthdr_017(unsigned int intnum, void *sp){unreg_inthdr(17,sp);}
129 void ur_inthdr_018(unsigned int intnum, void *sp){unreg_inthdr(18,sp);}
130 void ur_inthdr_019(unsigned int intnum, void *sp){unreg_inthdr(19,sp);}
131 void ur_inthdr_020(unsigned int intnum, void *sp){unreg_inthdr(20,sp);}
132 void ur_inthdr_021(unsigned int intnum, void *sp){unreg_inthdr(21,sp);}
133 void ur_inthdr_022(unsigned int intnum, void *sp){unreg_inthdr(22,sp);}
134 void ur_inthdr_023(unsigned int intnum, void *sp){unreg_inthdr(23,sp);}
135 void ur_inthdr_024(unsigned int intnum, void *sp){unreg_inthdr(24,sp);}
136 void ur_inthdr_025(unsigned int intnum, void *sp){unreg_inthdr(25,sp);}
137 void ur_inthdr_026(unsigned int intnum, void *sp){unreg_inthdr(26,sp);}
138 void ur_inthdr_027(unsigned int intnum, void *sp){unreg_inthdr(27,sp);}
139 void ur_inthdr_028(unsigned int intnum, void *sp){unreg_inthdr(28,sp);}
140 void ur_inthdr_029(unsigned int intnum, void *sp){unreg_inthdr(29,sp);}
141 void ur_inthdr_030(unsigned int intnum, void *sp){unreg_inthdr(30,sp);}
142 void ur_inthdr_031(unsigned int intnum, void *sp){unreg_inthdr(31,sp);}
143 void ur_inthdr_032(unsigned int intnum, void *sp){unreg_inthdr(32,sp);}
144 void ur_inthdr_033(unsigned int intnum, void *sp){unreg_inthdr(33,sp);}
145 void ur_inthdr_034(unsigned int intnum, void *sp){unreg_inthdr(34,sp);}
146 void ur_inthdr_035(unsigned int intnum, void *sp){unreg_inthdr(35,sp);}
147 void ur_inthdr_036(unsigned int intnum, void *sp){unreg_inthdr(36,sp);}
148 void ur_inthdr_037(unsigned int intnum, void *sp){unreg_inthdr(37,sp);}
149 void ur_inthdr_038(unsigned int intnum, void *sp){unreg_inthdr(38,sp);}
150 void ur_inthdr_039(unsigned int intnum, void *sp){unreg_inthdr(39,sp);}
151 void ur_inthdr_040(unsigned int intnum, void *sp){unreg_inthdr(40,sp);}
152 void ur_inthdr_041(unsigned int intnum, void *sp){unreg_inthdr(41,sp);}
153 void ur_inthdr_042(unsigned int intnum, void *sp){unreg_inthdr(42,sp);}
154 void ur_inthdr_043(unsigned int intnum, void *sp){unreg_inthdr(43,sp);}
155 void ur_inthdr_044(unsigned int intnum, void *sp){unreg_inthdr(44,sp);}
156 void ur_inthdr_045(unsigned int intnum, void *sp){unreg_inthdr(45,sp);}
157 void ur_inthdr_046(unsigned int intnum, void *sp){unreg_inthdr(46,sp);}
158 void ur_inthdr_047(unsigned int intnum, void *sp){unreg_inthdr(47,sp);}
159 void ur_inthdr_048(unsigned int intnum, void *sp){unreg_inthdr(48,sp);}
160 void ur_inthdr_049(unsigned int intnum, void *sp){unreg_inthdr(49,sp);}
161 void ur_inthdr_050(unsigned int intnum, void *sp){unreg_inthdr(50,sp);}
162 void ur_inthdr_051(unsigned int intnum, void *sp){unreg_inthdr(51,sp);}
163 void ur_inthdr_052(unsigned int intnum, void *sp){unreg_inthdr(52,sp);}
164 void ur_inthdr_053(unsigned int intnum, void *sp){unreg_inthdr(53,sp);}
165 void ur_inthdr_054(unsigned int intnum, void *sp){unreg_inthdr(54,sp);}
166 void ur_inthdr_055(unsigned int intnum, void *sp){unreg_inthdr(55,sp);}
167 void ur_inthdr_056(unsigned int intnum, void *sp){unreg_inthdr(56,sp);}
168 void ur_inthdr_057(unsigned int intnum, void *sp){unreg_inthdr(57,sp);}
169 void ur_inthdr_058(unsigned int intnum, void *sp){unreg_inthdr(58,sp);}
170 void ur_inthdr_059(unsigned int intnum, void *sp){unreg_inthdr(59,sp);}
171 void ur_inthdr_060(unsigned int intnum, void *sp){unreg_inthdr(60,sp);}
172 void ur_inthdr_061(unsigned int intnum, void *sp){unreg_inthdr(61,sp);}
173 void ur_inthdr_062(unsigned int intnum, void *sp){unreg_inthdr(62,sp);}
174 void ur_inthdr_063(unsigned int intnum, void *sp){unreg_inthdr(63,sp);}
175 void ur_inthdr_064(unsigned int intnum, void *sp){unreg_inthdr(64,sp);}
176 void ur_inthdr_065(unsigned int intnum, void *sp){unreg_inthdr(65,sp);}
177 void ur_inthdr_066(unsigned int intnum, void *sp){unreg_inthdr(66,sp);}
178 void ur_inthdr_067(unsigned int intnum, void *sp){unreg_inthdr(67,sp);}
179 void ur_inthdr_068(unsigned int intnum, void *sp){unreg_inthdr(68,sp);}
180 void ur_inthdr_069(unsigned int intnum, void *sp){unreg_inthdr(69,sp);}
181 void ur_inthdr_070(unsigned int intnum, void *sp){unreg_inthdr(70,sp);}
182 void ur_inthdr_071(unsigned int intnum, void *sp){unreg_inthdr(71,sp);}
183 void ur_inthdr_072(unsigned int intnum, void *sp){unreg_inthdr(72,sp);}
184 void ur_inthdr_073(unsigned int intnum, void *sp){unreg_inthdr(73,sp);}
185 void ur_inthdr_074(unsigned int intnum, void *sp){unreg_inthdr(74,sp);}
186 void ur_inthdr_075(unsigned int intnum, void *sp){unreg_inthdr(75,sp);}
187 void ur_inthdr_076(unsigned int intnum, void *sp){unreg_inthdr(76,sp);}
188 void ur_inthdr_077(unsigned int intnum, void *sp){unreg_inthdr(77,sp);}
189 void ur_inthdr_078(unsigned int intnum, void *sp){unreg_inthdr(78,sp);}
190 void ur_inthdr_079(unsigned int intnum, void *sp){unreg_inthdr(79,sp);}
191 void ur_inthdr_080(unsigned int intnum, void *sp){unreg_inthdr(80,sp);}
192 void ur_inthdr_081(unsigned int intnum, void *sp){unreg_inthdr(81,sp);}
193 void ur_inthdr_082(unsigned int intnum, void *sp){unreg_inthdr(82,sp);}
194 void ur_inthdr_083(unsigned int intnum, void *sp){unreg_inthdr(83,sp);}
195 void ur_inthdr_084(unsigned int intnum, void *sp){unreg_inthdr(84,sp);}
196 void ur_inthdr_085(unsigned int intnum, void *sp){unreg_inthdr(85,sp);}
197 void ur_inthdr_086(unsigned int intnum, void *sp){unreg_inthdr(86,sp);}
198 void ur_inthdr_087(unsigned int intnum, void *sp){unreg_inthdr(87,sp);}
199 void ur_inthdr_088(unsigned int intnum, void *sp){unreg_inthdr(88,sp);}
200 void ur_inthdr_089(unsigned int intnum, void *sp){unreg_inthdr(89,sp);}
201 void ur_inthdr_090(unsigned int intnum, void *sp){unreg_inthdr(90,sp);}
202 void ur_inthdr_091(unsigned int intnum, void *sp){unreg_inthdr(91,sp);}
203 void ur_inthdr_092(unsigned int intnum, void *sp){unreg_inthdr(92,sp);}
204 void ur_inthdr_093(unsigned int intnum, void *sp){unreg_inthdr(93,sp);}
205 void ur_inthdr_094(unsigned int intnum, void *sp){unreg_inthdr(94,sp);}
206 void ur_inthdr_095(unsigned int intnum, void *sp){unreg_inthdr(95,sp);}
207 void ur_inthdr_096(unsigned int intnum, void *sp){unreg_inthdr(96,sp);}
208 void ur_inthdr_097(unsigned int intnum, void *sp){unreg_inthdr(97,sp);}
209 
210 extern void _endof_stack();
211 extern void start(void);
212 
213 static const gs_inthdr init_gs_inthdr_table[MAXVECT] = {
214  ur_inthdr_000,
215  ur_inthdr_001,
216  ur_inthdr_002,
217  ur_inthdr_003,
218  ur_inthdr_004,
219  ur_inthdr_005,
220  ur_inthdr_006,
221  ur_inthdr_007,
222  ur_inthdr_008,
223  ur_inthdr_009,
224  ur_inthdr_010,
225  ur_inthdr_011,
226  ur_inthdr_012,
227  ur_inthdr_013,
228  ur_inthdr_014,
229  ur_inthdr_015,
230  ur_inthdr_016,
231  ur_inthdr_017,
232  ur_inthdr_018,
233  ur_inthdr_019,
234  ur_inthdr_020,
235  ur_inthdr_021,
236  ur_inthdr_022,
237  ur_inthdr_023,
238  ur_inthdr_024,
239  ur_inthdr_025,
240  ur_inthdr_026,
241  ur_inthdr_027,
242  ur_inthdr_028,
243  ur_inthdr_029,
244  ur_inthdr_030,
245  ur_inthdr_031,
246  ur_inthdr_032,
247  ur_inthdr_033,
248  ur_inthdr_034,
249  ur_inthdr_035,
250  ur_inthdr_036,
251  ur_inthdr_037,
252  ur_inthdr_038,
253  ur_inthdr_039,
254  ur_inthdr_040,
255  ur_inthdr_041,
256  ur_inthdr_042,
257  ur_inthdr_043,
258  ur_inthdr_044,
259  ur_inthdr_045,
260  ur_inthdr_046,
261  ur_inthdr_047,
262  ur_inthdr_048,
263  ur_inthdr_049,
264  ur_inthdr_050,
265  ur_inthdr_051,
266  ur_inthdr_052,
267  ur_inthdr_053,
268  ur_inthdr_054,
269  ur_inthdr_055,
270  ur_inthdr_056,
271  ur_inthdr_057,
272  ur_inthdr_058,
273  ur_inthdr_059,
274  ur_inthdr_060,
275  ur_inthdr_061,
276  ur_inthdr_062,
277  ur_inthdr_063,
278  ur_inthdr_064,
279  ur_inthdr_065,
280  ur_inthdr_066,
281  ur_inthdr_067,
282  ur_inthdr_068,
283  ur_inthdr_069,
284  ur_inthdr_070,
285  ur_inthdr_071,
286  ur_inthdr_072,
287  ur_inthdr_073,
288  ur_inthdr_074,
289  ur_inthdr_075,
290  ur_inthdr_076,
291  ur_inthdr_077,
292  ur_inthdr_078,
293  ur_inthdr_079,
294  ur_inthdr_080,
295  ur_inthdr_081,
296  ur_inthdr_082,
297  ur_inthdr_083,
298  ur_inthdr_084,
299  ur_inthdr_085,
300  ur_inthdr_086,
301  ur_inthdr_087,
302  ur_inthdr_088,
303  ur_inthdr_089,
304  ur_inthdr_090,
305  ur_inthdr_091,
306  ur_inthdr_092,
307  ur_inthdr_093,
308  ur_inthdr_094,
309  ur_inthdr_095,
310  ur_inthdr_096,
311  ur_inthdr_097,
312 };
313 
314 extern void int000(void);
315 extern void int001(void);
316 extern void int002(void);
317 extern void int003(void);
318 extern void int004(void);
319 extern void int005(void);
320 extern void int006(void);
321 extern void int007(void);
322 extern void int008(void);
323 extern void int009(void);
324 extern void int010(void);
325 extern void int011(void);
326 extern void int012(void);
327 extern void int013(void);
328 extern void int014(void);
329 extern void int015(void);
330 extern void int016(void);
331 extern void int017(void);
332 extern void int018(void);
333 extern void int019(void);
334 extern void int020(void);
335 extern void int021(void);
336 extern void int022(void);
337 extern void int023(void);
338 extern void int024(void);
339 extern void int025(void);
340 extern void int026(void);
341 extern void int027(void);
342 extern void int028(void);
343 extern void int029(void);
344 extern void int030(void);
345 extern void int031(void);
346 extern void int032(void);
347 extern void int033(void);
348 extern void int034(void);
349 extern void int035(void);
350 extern void int036(void);
351 extern void int037(void);
352 extern void int038(void);
353 extern void int039(void);
354 extern void int040(void);
355 extern void int041(void);
356 extern void int042(void);
357 extern void int043(void);
358 extern void int044(void);
359 extern void int045(void);
360 extern void int046(void);
361 extern void int047(void);
362 extern void int048(void);
363 extern void int049(void);
364 extern void int050(void);
365 extern void int051(void);
366 extern void int052(void);
367 extern void int053(void);
368 extern void int054(void);
369 extern void int055(void);
370 extern void int056(void);
371 extern void int057(void);
372 extern void int058(void);
373 extern void int059(void);
374 extern void int060(void);
375 extern void int061(void);
376 extern void int062(void);
377 extern void int063(void);
378 extern void int064(void);
379 extern void int065(void);
380 extern void int066(void);
381 extern void int067(void);
382 extern void int068(void);
383 extern void int069(void);
384 extern void int070(void);
385 extern void int071(void);
386 extern void int072(void);
387 extern void int073(void);
388 extern void int074(void);
389 extern void int075(void);
390 extern void int076(void);
391 extern void int077(void);
392 extern void int078(void);
393 extern void int079(void);
394 extern void int080(void);
395 extern void int081(void);
396 extern void int082(void);
397 extern void int083(void);
398 extern void int084(void);
399 extern void int085(void);
400 extern void int086(void);
401 extern void int087(void);
402 extern void int088(void);
403 extern void int089(void);
404 extern void int090(void);
405 extern void int091(void);
406 extern void int092(void);
407 extern void int093(void);
408 extern void int094(void);
409 extern void int095(void);
410 extern void int096(void);
411 extern void int097(void);
412 
413 const inthdr init_inthdr_table[MAXVECT] __attribute__ ((section("vect"))) = {
414  _endof_stack,
415  start,
416  int002, // 0x00000008 2 NMI
417  int003, // 0x0000000c 3 HardFault
418  int004, // 0x00000010 4 MemManage
419  int005, // 0x00000014 5 BusFault
420  int006, // 0x00000018 6 UsageFault
421  int007, // 0x0000001c 7 Reserved
422  int008, // 0x00000020 8 Reserved
423  int009, // 0x00000024 9 Reserved
424  int010, // 0x00000028 10 Reserved
425  int011, // 0x0000002c 11 SVCall
426  int012, // 0x00000030 12 Debug Monitor
427  int013, // 0x00000034 13 Reserved
428  int014, // 0x00000038 14 PendSV
429  int015, // 0x0000003c 15 SysTick
430  int016, // 0x00000040 16 WWDG
431  int017, // 0x00000044 17 PVD
432  int018, // 0x00000048 18 TAMP_STAMP
433  int019, // 0x0000004c 19 RTC_WKUP
434  int020, // 0x00000050 20 FLASH
435  int021, // 0x00000054 21 RCC
436  int022, // 0x00000058 22 EXTI0
437  int023, // 0x0000005c 23 EXTI1
438  int024, // 0x00000060 24 EXTI2
439  int025, // 0x00000064 25 EXTI3
440  int026, // 0x00000068 26 EXTI4
441  int027, // 0x0000006c 27 DMA1_Stream0
442  int028, // 0x00000070 24 DMA1_Stream1
443  int029, // 0x00000074 29 DMA1_Stream2
444  int030, // 0x00000078 30 DMA1_Stream3
445  int031, // 0x0000007c 31 DMA1_Stream4
446  int032, // 0x00000080 32 DMA1_Stream5
447  int033, // 0x00000084 33 DMA1_Stream6
448  int034, // 0x00000088 34 ADC
449  int035, // 0x0000008c 35 CAN1_TX
450  int036, // 0x00000090 36 CAN1_RX0
451  int037, // 0x00000094 37 CAN1_RX1
452  int038, // 0x00000098 38 CAN1_SCE
453  int039, // 0x0000009c 39 EXTI9_5
454  int040, // 0x000000a0 40 TIM1_BRK_TIM9 (0xa0)
455  int041, // 0x000000a4 41 TIM1_UP_TIM10
456  int042, // 0x000000a8 42 TIM1_TRG_COM_TIM11
457  int043, // 0x000000ac 43 TIM1_CC
458  int044, // 0x000000b0 44 TIM2
459  int045, // 0x000000b4 45 TIM3
460  int046, // 0x000000b8 46 TIM4
461  int047, // 0x000000cc 47 I2C1_EV
462  int048, // 0x000000c0 48 I2C1_ER
463  int049, // 0x000000c4 49 I2C2_EV
464  int050, // 0x000000c8 50 I2C2_ER
465  int051, // 0x000000cc 51 SPI1
466  int052, // 0x000000d0 52 SPI2
467  int053, // 0x000000d4 53 USART1
468  int054, // 0x000000d8 54 USART2
469  int055, // 0x000000dc 55 USART3
470  int056, // 0x000000e0 56 EXTI15_10
471  int057, // 0x000000e4 57 RTC_Alarm
472  int058, // 0x000000e8 58 OTG_FS_WKUP
473  int059, // 0x000000ec 59 TIM8_BRK_TIM12
474  int060, // 0x000000f0 60 TIM8_UP_TIM13
475  int061, // 0x000000f4 61 TIM8_TRG_COM_TIM14
476  int062, // 0x000000f8 62 TIM8_CC
477  int063, // 0x000000fc 63 DMA1_Stream7
478  int064, // 0x00000100 64 FSMC
479  int065, // 0x00000104 65 SDIO
480  int066, // 0x00000108 66 TIM5
481  int067, // 0x0000010c 67 SPI3
482  int068, // 0x00000110 68 USART4
483  int069, // 0x00000114 69 USART5
484  int070, // 0x00000118 70 TIM6_DAC
485  int071, // 0x0000011c 71 TIM7
486  int072, // 0x00000120 72 DMA2_Stream0
487  int073, // 0x00000124 73 DMA2_Stream1
488  int074, // 0x00000128 74 DMA2_Stream2
489  int075, // 0x0000012c 75 DMA2_Stream3
490  int076, // 0x00000130 76 DMA2_Stream4
491  int077, // 0x00000134 77 ETH
492  int078, // 0x00000138 78 ETH_WKUP
493  int079, // 0x0000013c 79 CAN2_TX
494  int080, // 0x00000140 80 CAN2_RX0
495  int081, // 0x00000144 81 CAN2_RX1
496  int082, // 0x00000148 82 CAN2_SCE
497  int083, // 0x0000014c 83 OTG_FS
498  int084, // 0x00000150 84 DMA2_Stream5
499  int085, // 0x00000154 85 DMA2_Stream6
500  int086, // 0x00000158 86 DMA2_Stream7
501  int087, // 0x0000015c 87 USART6
502  int088, // 0x00000160 88 I2C3_EV
503  int089, // 0x00000164 89 I2C3_ER
504  int090, // 0x00000168 90 OTG_HS_EP1_OUT
505  int091, // 0x0000016c 91 OTG_HS_EP1_IN
506  int092, // 0x00000170 92 OTG_HS_WKUP
507  int093, // 0x00000174 93 OTG_HS
508  int094, // 0x00000178 94 DCMI
509  int095, // 0x0000017c 95 CRYP
510  int096, // 0x00000180 96 HASH_RNG
511  int097, // 0x00000184 97 FPU
512 };
513 
514 gs_inthdr inthdr_table[MAXVECT];
515 
516 void init_interrupt_vector(void)
517 {
518  int i;
519 
520  for(i=0; i<MAXVECT; i++) {
521  inthdr_table[i] = init_gs_inthdr_table[i];
522  }
523 
524 // inthdr_table[3] = fault_inthdr;
525 }
526 
527 int register_interrupt(unsigned short vectnum,
528  void (* func)(unsigned int intnum, void *sp))
529 {
530  if(inthdr_table[vectnum] == init_gs_inthdr_table[vectnum]) {
531  inthdr_table[vectnum] = func;
532  } else {
533  SYSERR_PRINT("Interrupt Vector %d allready registered.\n",
534  vectnum);
535  return -1;
536  }
537 
538  return 0;
539 }
540 
541 int unregister_interrupt(unsigned short vectnum)
542 {
543  inthdr_table[vectnum] = init_gs_inthdr_table[vectnum];
544 
545  return 0;
546 }
547 
548 #ifdef GSC_KERNEL_ENABLE_INTERRUPT_COUNT
549 static unsigned int interrupt_count[MAXVECT];
550 
551 int get_interrupt_count(int intnum)
552 {
553  if(inthdr_table[intnum] == init_gs_inthdr_table[intnum]) {
554  return -1;
555  } else {
556  return (int)interrupt_count[intnum];
557  }
558 }
559 #endif
560 
561 void interrupt_func(unsigned int intnum, void *sp)
562 {
563  void (* func)(unsigned int in, void *s);
564 
565 #ifdef GSC_KERNEL_ENABLE_INTERRUPT_COUNT
566  interrupt_count[intnum] ++;
567 #endif
568 
569  last_int = intnum;
570  last_sp = sp;
571 
572  func = inthdr_table[intnum];
573 
574  flg_interrput_proc = 1;
575  (* func)(intnum, sp);
576  flg_interrput_proc = 0;
577 }
st_regs
Cortex-M3 MCU レジスタ定義
Definition: asm-Cortex-M3.h:22
tkprintf
int tkprintf(const char *fmt,...)
非タスクコンテキスト実行用メッセージ出力
Definition: tkprintf.c:100
tkprintf.h
カーネル用機能限定printf
interrupt.h
割り込みハンドラ
calltrace.h
デバッグ用システムコールトレース
task.h
タスク制御